- Issue
- Journal of Siberian Federal University. Engineering & Technologies. 2019 12 (7)
- Authors
- Zubov, Timur A.; Sukhotin, Vitaly V.; Khnykin, Anton V.; Mishurov, Andrey V.; Gorchakovsky, Alexander A.
- Contact information
- Zubov, Timur A.: Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia; Sukhotin, Vitaly V.: Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia; Khnykin, Anton V.: Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia; ; Mishurov, Andrey V.: Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia; Gorchakovsky, Alexander A.: Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia
- Keywords
- multiplier; Galois fields; combinational logic; reconfigurable module; Bose Chaudhuri Hocquenghem Codes
- Abstract
The concept of “multiplier” in Galois fields, which are widely used in cryptography and noiseresistant coding, is considered. The architecture of a parallel multiplier for the Galois fields is analyzed. Reconfigurable multiplier is constructed. It is shown that the use of this type of multiplier will significantly reduce the number of logic gates
- Pages
- 802-809
- DOI
- 10.17516/1999-494X-0180
- Paper at repository of SibFU
- https://elib.sfu-kras.ru/handle/2311/126975
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License (CC BY-NC 4.0).