- Issue
- Journal of Siberian Federal University. Engineering & Technologies. 2014 7 (6)
- Authors
- Nepomnyashchy, Oleg V.; Legalov, Alexander I.; Sirotinina, Natalia J.
- Contact information
- Nepomnyashchy, Oleg V.:Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia;E-mail: ; Legalov, Alexander I.:Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia; Sirotinina, Natalia J.:Siberian Federal University 79 Svobodny, Krasnoyarsk, 660041, Russia
- Keywords
- integrated circuit; high-level design; verification; algorithm; parallel data flows; program transformation; functional data-flow programming
- Abstract
Design flows for very-large-scale integration circuit are considered. The problems arising from the realization of the project using top-down and system design methods are highlighted. The technology of an architecture-independent design for computer systems on a chip is suggested. The technology is based on a functional data-flow presentation of the initial algorithms and their subsequent step-bystep transformation at the register transfer level into description of the system being designed. Using methods of formal description and verification allows developers to transfer initial high-level parallel algorithms on topologies of the configurable integrated circuits being developed
- Pages
- 674-684
- Paper at repository of SibFU
- https://elib.sfu-kras.ru/handle/2311/13372
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License (CC BY-NC 4.0).